An End to Moore’s Law? Shrinking Transistors Will No Longer Be Viable by 2021
According to experts, in just 5 years, Moore's Law is going to reach its crunch point.
Killing Him Again
If there is one thing that has its death constantly predicted, but yet, is still here kicking around, it has to be computers. Well, to be specific, we’re talking about the death of Moore’s Law. As the University of Missouri notes, Moore’s Law is “the so-called law which says that the number of transistors that can be fit on a computer chip will double every 18 months, resulting in periodic increases in computing power”).
And it seems like every new technology in computing is a harbinger of the end of this law; the semiconductor industry has been preparing for its end for quite some time now. But it seems that we might finally have a date for when the last nail will be in the coffin.
The recently released 2015 International Technology Roadmap for Semiconductors has predicted that the transistor would stop shrinking in just five years, by 2021.
The report finds that, by that year, shrinking the dimensions of transistors in microprocessors will be economically nonviable. However, there is hope. Companies could pursue other avenues and keep Moore’s Law alive for a bit longer.
Specifically, chip companies are expected to look at other strategies to increase density. This would include turning the transistor from a horizontal to a vertical geometry and building multiple layers of circuitry, one on top of another.
The report, titled ITRS 2.0, seeks to embody and convey shifts in the computing industry. One such shift is the industry focus. Previously, semiconductor speeds and features defined the computer application industry. Now, it is the applications that define the features that semiconductors must provide.
The penultimate ITRS report actually predicted that physical gate length of transistors—an indicator of how far current must travel in the device—and other key logic chip dimensions would continue to shrink until at least 2028.
But this is before the development of 3D concepts. Three dimensional architectures are now being seen as the key to ease miniaturization pressure and boost the capacity of NAND Flash. Monolithic 3D integration, layers of devices built one on top of another, connected by a forest of wires, has also been gaining traction.
The report has seen other emerging trends, such as lateral, gate-all-around devices, vertical transistors, and alternate materials to silicon.
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